The Resonant Tunnelling Transistor
Colin Moffat
Image Processing Group
Department of Physics and Astronomy
Universty College London
Gower Street
London. WC1E 6BT
Tel. 0171-209 6582
Fax. 0171-209 6580
Contents
1. Introduction
1.1 The problem with conventional transistors
2. Resonant Tunnelling Devices
2.1 The Resonant Tunnelling Diode (RTD)
2.1.1 Application of the RTD to Multiple-State Memory
2.2 Resonant Tunnelling Transistors
2.2.1 The Resonant Tunnelling Hot-Electron Transistor (RHET)
2.2.2 The Quantum Excited State Transistor (QuESTT)
3. Functional Application of Resonant Tunnelling Devices
3.1 The Bistable Pair
3.2 Memory Operation
3.3 Digital Logic Operation
3.3.1 Conventional Logic
3.3.2 Threshold Logic
4. Conclusion
References
Note
This document is an edited version of an internal group report.
Its primary intention is to provide background information as an aid
to the understanding of the Resonant Tunnelling Transistor Demo.
It is not to be taken as a complete paper detailing the workings of the
resonant tunnelling transistor.
If you wish to gain a quick overview of the device without reading the
whole document, I suggest you refer to sections 2.1, 2.2.2, 3.1 and 3.3.
Unfortunately, several of the figures had to be scanned in, and are of
poor quality (though I am working on them). However, a better quality
version of the document is available here in Microsoft Word 6.0 format.
Please don't hesitate to mail me if you spot any errors or have any
questions.
1. Introduction
There is continuous pressure on computer manufacturers to reduce the
size of transistors, and there are three reasons for this:
1. A smaller transistor will switch faster, giving a speed-up in
processing time.
2. Smaller transistors allow more complex processors to be built
within the same area as before.
3. Alternatively, smaller transistors allow a greater number of
standard processors to be built within the same area as before.
However, there is a fundamental limit to how small a conventional
transistor can be, and if this limit is surpassed the device will
cease to be of use. Current digital computing depends on the fact
that transistors can be used to switch electrical current flow on and
off, but once a conventional transistor shrinks past its physical
limit, it will begin to leak. The more that the transistor shrinks,
the more it leaks, until eventually it becomes useless as a switching
device [1]. This will signal the end of any further increase in
computational power using conventional transistors.
At this point, it is necessary to redesign the transistor.
Conventional transistors are several microns in size, but useful new
devices will eventually operate at dimensions on the nanometre scale
(1 micron = 1000 nanometres). To give an idea of the scales involved,
these Nanoelectronic devices are intended to have feature sizes
comparable to the wavelength of an electron, and will operate at
ultra-high speed with an ultra- high circuit density. Resonant
tunnelling devices are especially useful because of their novel output
characteristics, allowing many operations to be carried out with fewer
components than usual.
1.1 The problem with conventional transistors
Conventional transistors use potential barriers to control the flow of
charge. The two most common types of barrier are pn-junctions (within
the bipolar transistor) and electrostatic depletion regions (within
the field effect transistor). Figure 1.1 shows the energy band
diagram of a bipolar transistor, with the emitter on the left, the
collector on the right, and the potential barrier base region in the
middle. Initially, a voltage is applied between the emitter and the
collector, but not between the emitter and the base. The potential
barrier at the base prevents current from passing through the
transistor, so it is switched off.
As the voltage across the base region is increased (with respect to
the emitter), the height of the barrier on the emitter side is
decreased. As it decreases, more and more electrons entering the
emitter are able to cross the base and exit through the collector, as
shown in figure 1.2. The transistor is now switched on.
The use of a barrier to control the flow of electrons from one end of
the device to the other is the basis of all transistor action, and
current digital computing depends upon it. The trouble with this
design is that the width of the potential barrier at the base must
always be sufficiently greater than the wavelength of an electron
(approx. 10nm). If it s not, electrons will actually begin to tunnel
right through it (figure 1.3).
This causes the transistor to leak, and the more that the width of the
barrier is reduced the more it will leak. Once this happens, the
transistor cannot be totally turned off and is no longer effective as
a switching device. Nanoelectronic devices however, (particularly the
resonant tunnelling devices described in this report) are designed to
take advantage of quantum mechanical effects such as tunnelling, so
the width limit does not apply.
2. Resonant Tunnelling Devices
2.1 The Resonant Tunnelling Diode (RTD)
The resonant tunnelling diode (or RTD) consists of an emitter and
collector region, and a double tunnel barrier structure which contains
a quantum well (as shown in the energy band diagrams of figure 2.1).
This quantum well is so narrow (5-10 nm) that it can only contain a
single, so called resonant, energy level. The principle of this
device is that electrons wishing to travel from the emitter to the
collector can only do so if they are lined up with this resonant
energy level.
Initially, with a low voltage across the device (at point A), the
electrons are below the point of resonance, and no current can flow
through the device. As the voltage increases, the emitter region is
warped upwards, and the collector region is warped downwards.
Eventually, the band of electrons in the emitter will line up with the
resonant energy state, and are free to tunnel through to the right.
This gives an increase in the current up to the peak at point B.
As the voltage across the device increases, the electrons are pushed
up past the resonant energy level and are unable to continue
tunnelling. This can be observed by the drop in current to the valley
at point C. As the voltage continues to increase, more and more
electrons are able to flow over the top of the tunnel barriers, and
the current flow will rise [2].
The current-voltage characteristic of this device is similar to that
of the Esaki tunnel diode in that it exhibits a peak and a valley in
the curve. The difference is that RTDs have a much lower device
capacitance which allows them to oscillate faster, and their
current-voltage characteristics (i.e. the position of the peak and the
valley) can be shaped with the appropriate bandgap engineering [3].
2.1.1 Application of the RTD to Multiple-State Memory
Several resonant tunnelling diodes can be combined to generate
multiple peaks on the current-voltage curve (such that n diodes will
produce n peaks). For example, two RTDs connected in parallel across
a voltage source which increases from 0 to Vbias will give the double
peak-and-valley characteristic shown in figure 2.2a. Note that one of
the RTDs must be connected in series with a suitable offset resistance
(Roffset). If it is not, both RTDs will produce a peak and valley at
the same time, giving the same output as a single RTD.
If these RTDs are connected in series with a load resistor, RL (as
shown in figure 2.2b), the load line of the resistor will intersect
the positive slope of the curve at the three stable operating points
Q1, Q2 and Q3 (figure 2.2a). This means that if the voltage across
the RTDs is measured it can only ever be one of V1, V2 or V3 -
effectively producing a 3-state memory cell. The RTDs are forced into
one of these states by momentarily writing a second voltage across
them (using Vwrite in figure 2.2b). For example, if Vwrite = V2 is
temporarily applied across the RTDs, they will remain at V2.
This system provides n+1 stable operating points from n peaks, and can
be used for storing values from an n+1 state logic [4 - 7].
2.2 Resonant Tunnelling Transistors
2.2.1 The Resonant Tunnelling Hot-Electron Transistor (RHET)
A resonant tunnelling transistor (RTT) is a transistor which has a
current-voltage characteristic similar to that of a resonant
tunnelling diode (i.e., a peak and a valley). This characteristic may
be single or multiple-peaked, depending on the type of implementation.
One example of an RTT is the resonant-tunnelling hot-electron
transistor (or RHET). This is effectively a conventional hot-electron
transistor which contains an RTD between the emitter and the base
(figure 2.3).
The position of the resonant energy level (relative to the emitter) is
controlled by the base voltage. When there is a zero base voltage, no
current can flow through the device as the electrons in the emitter
are below the resonant energy level. Increasing the base voltage
pulls the resonant energy level down towards the electrons in the
emitter, and only when they are lined up (or in resonance) can current
flow through the device. This produces a peak in the current output.
As the base voltage continues to increase, the resonant energy level
is pulled down past the electrons in the emitter, and resonant
tunnelling stops. This causes the valley in the current output.
An important point about this device is that the resonant energy level
is very high, which means that electrons can only enter the base when
they have a substantial kinetic energy. These are known as hot
electrons, hence the name of the device. The greater than average
energy of the electrons means that they will pass through the base
very quickly, possibly without scattering. This allows a very
high-frequency operation (41 GHz oscillation has been demonstrated so
far) [8 - 9, 3].
2.2.2 The Quantum Excited State Transistor (QuESTT)
The quantum excited state transistor, or QuESTT, is an RTD-like
structure which makes direct electrical contact to the quantum well
and treats it as the base (figure 2.4). As with the RTD, charge can
only cross the base if the emitter is in resonance with one of the
confined states of the well. In this case though, the energy levels
in the well can be moved up and down independently of the emitter and
the collector, giving control over the point of resonance.
The potential of the quantum well is modulated by removing or
injecting charge into the ground state. Normally, this charge would
leak out through the tunnel barriers, but the QuESTT has a ground
state which is hidden from the emitter and collector energy bands,
effectively confining the charge carriers to the base. This is
achieved by making the bandgaps of the emitter and collector wider
than that of the well, such that tunnelling current passes through an
excited state of the well.
The main difficulty with this type of device is making direct
electrical contact to this ultra-small well region. At the moment,
this device exhibits no significant gain, but because there are no
pn-junctions or depletion regions the QuESTT is potentially very
scaleable [10, 11].
The ultimate scaling of this or a QuESTT-type device would be to a
1-dimensional electron gas (also known as a 1DEG or a quantum wire)
for the emitter and collector, and a 0-dimensional electron gas (0DEG
or quantum dot) for the base. Such a device would be ultra-fast, and
have an ultra-high packing density. However, as devices increase in
speed, they will eventually spend more and more of their time waiting
for signals to arrive from other devices. This is a limiting factor,
and means that a super- fast device could not operate at its full
potential without further developments in fast interconnects. The
output characteristics of both of the RTTs are identical to that of an
RTD, with one important exception - the resonant point is controlled
by a third terminal, the base. If the resonant energy level is moved
up and down, the output peak current of the device moves up and down
as well. This is because the resonant energy level is the point at
which the maximum number of electrons can pass through the device
(figure 2.5). It will be shown in section 3 that this fact makes
resonant tunnelling devices ideal for use in threshold logic
applications.
Note that the circuit symbol used in this report for an RTT is the
same as that of an RTD, but with three or more terminals (where the
third and later terminals represent base contacts).
3. Functional Application of Resonant Tunnelling Devices
3.1 The Bistable Pair
All resonant tunnelling logic families depend upon the principle of
voltage stability. This was touched upon in section 2.1.1 with the
ternary (3-state) memory cell, which requires three stable output
voltage states (tristability). The logic families covered in this
report are all binary, so require only two stable states
(bistability).
However many states are required, the heart of any resonant tunnelling
logic element (be it a memory cell or a digital gate) consists of two
devices - the load and the driver. The load can either be a resistor
(as in section 2.1.1), a transistor, an RTD or an RTT (depending on
the implementation), whilst the driver is almost always an RTD or an
RTT.
With binary devices the load and the driver are referred to as a
bistable pair. Figure 3.1 shows bistable pairs with the different
load devices.
Each load device intersects the driver at two stable points, Q1 and
Q2, and the unstable point, P. Ignoring the unstable point for now,
this means that if the voltage across the resonant tunnelling driver
device is measured, it can only ever be equal to V1 or V2. In binary
logic, voltage V1 will represent binary state 0, and voltage V2 will
represent binary state 1.
3.2 Memory Operation
If the bistable pair is being used as a memory cell, a value is stored
by temporarily applying the appropriate voltage (V1 for state 0 or V2
for state 1) across the driver device (as in section 2.1.1). The pair
will latch into the required state, and will remain there until a
different voltage is applied. Whether a resistor, transistor or
resonant tunnelling device is being used as the load does not make any
difference to the logical operation of the memory cell. However, it
is preferable to use a pair of resonant tunnelling devices as
resistors and conventional transistors are not nanoelectronic
components.
Since the bistable pair must always be at V1 or V2, what happens if a
voltage not equal to V1 or V2 is applied to the memory cell? The
answer is that the pair of devices will resolve themselves into one of
the allowed states, unless the voltage is very close to the unstable
point, P. Which of the states is chosen depends on the following
rules:
1. If applied voltage, Vwrite <= V1, voltage resolves to V1, state = 0.
2. If V1 >= Vwrite < P, voltage resolves to V1, state = 0.
3. If P < Vwrite <= V2, voltage resolves to V2, state = 1.
4. If Vwrite >=V2, voltage resolves to V2, state = 1.
5. If Vwrite = P, intersection will remain at P, state = ?.
The intersection at P is not useful as a third logical state because
of its unstability. If the write voltage is slightly greater or less
than P, or if the cell receives sufficient thermal noise (both of
which are very likely), it will latch into state 0 or 1. Because of
this natural tendency to slip into one of two states, the memory cell
is very tolerant of noise. If a 0 is to be stored in the cell, the
write line can take any voltage less than P. If a 1 is to be stored,
the write line can take any voltage greater than P. Once the value is
stored, it is very difficult to accidentally flip the cell into a
different state.
3.3 Digital Logic Operation
A bistable pair can also be used to perform digital logic operations.
The output of the pair will always correspond to a binary 0 or 1, so
to carry out a logical function it is necessary that this output be a
function of one or more inputs. The only way that the bistable pair
can receive inputs is if the load and driver devices each have three
or more terminals (two for the positive and negative contacts, and the
rest for functional control - figure 3.3).
For simplicities sake, the remainder of this section will assume that
the load and driver devices are both resonant tunnelling transistors.
Other configurations are possible, but these are outside of the scope
of this document. This circuit contains only nanoelectronic devices,
and is the most general example for explaining the logical methods
upon which all the resonant tunnelling logic families are based. Note
that this configuration corresponds to the ideal form of the MOBILE
(monostable-bistable transition logic element) logic family [12 - 17].
As was shown in figure 2.5, the base inputs to an RTT allow the
position of the peak current output to be moved up and down. Figure
3.4 shows the set of possible outputs from a bistable pair of two
RTTs, each with two base inputs (as in figure 3.3 above). Each of the
RTTs has three possible output curves, corresponding to the sum of the
base inputs. This is assuming that a base input is represented by a
binary 0 or 1 (corresponding to a low or high input voltage signal),
and that the influence of each input on the RTT is the same.
Note that one of the output sets is always offset by half a step from
the other. This is an essential part of the logical operation of
these devices, as the output depends on the relative position of the
two curves selected by the inputs.
The output of this logical element is dependent on the following two
rules:
1. If Load Peak > Driver Peak, Output state = 1.
2. If Load Peak < Driver Peak, Output state = 0.
where the output states correspond to the two stable voltage states,
V1 and V2, mentioned previously.
This method of deriving the output from a greater than or less than
comparison of two values is called threshold logic [18]. It is a
superset of ordinary Boolean logic, and allows many conventional
functions to be implemented with a reduced number of logical elements.
This will be explored in greater detail in section 3.3.2, but first
the implementation of conventional functions (AND, OR etc.) will be
explained.
3.3.1 Conventional Logic
The functions AND, OR, Buffer (i.e. output = input), NAND, NOR and
Inverter can all be implemented with a single bistable pair of
resonant tunnelling devices (hereon referred to as a logical element).
Depending on the operation, either the load or the driver device is
given a constant base input which will fix its peak height at a
constant threshold value. The other device receives the binary
inputs, the sum of which will set its peak height. According to the
rules above, the output will then depend on which device has the
highest peak.
From figure 3.5, the load peak can take three positions, corresponding
to the sum of the A and B inputs (A+B = 0, A+B = 1, A+B = 2). The
driver device has a single base input which is used to fix its peak
height between A+B = 1 and A+B = 2 (i.e. at position 1.5). A
comparison of the curves shows that the output will only be equal to 1
if both A and B are equal to 1. This is the AND function.
In order to make a comparison between the two curves, the load curve
has to be swept across the driver. Initially, the three base inputs
are applied and held at the appropriate settings, and the bias
voltage, VBIAS, is steadily increased from 0 volts. Figures 3.6a and
3.6b show the progression of the intersection of the two curves as
VBIAS is increased. The load peak in figure 3.6a is lower than the
driver, and as the two peaks cross, the intersection drops back down
the slope, giving a final output state of 0. The load peak in figure
3.6b is higher than the driver, so when the two peaks cross, the
intersection is able to make it across the top. This gives a final
output state of 1.
The OR function is implemented by shifting the threshold to position
0.5 (i.e. between the curves A+B = 0 and A+B = 1). The threshold is
exceeded if either or both of the inputs is equal to 1, which produces
a high output state. The single input Buffer function is also
implemented with a threshold of 0.5, so that if A = 0, the output = 0,
and if A = 1, the output = 1.
The inverse set of functions, NAND, NOR and Inversion are implemented
in a similar way, except the variable inputs are applied to the
driver, and the threshold to the load. For example, figure 3.7 shows
the NAND implementation.
The function of the logical element is dependent on the threshold
value. If this input is variable instead of fixed, it is possible to
construct circuitry from variable function logic elements. This can
add to the flexibility of a system.
3.3.2 Threshold Logic
The set of functions just described can be expanded to include all of
those within threshold logic. This system takes the weighted sum of a
set of inputs and thresholds it to produce the binary output. All of
the standard Boolean functions can be implemented within it. More
importantly, threshold logic allows many Boolean functions to be
minimised, reducing the complexity of a system [18].
The notation of threshold logic differs from Boolean in that only the
plus and minus operators are used. To avoid confusion between the two
logics (such as the dual meaning of +), any Boolean operators
mentioned will be spelled out in capital letters (e.g. AND). A
threshold logic expression is contained within angle brackets, and the
threshold is given as a subscript to the closing bracket. Note that
the threshold is not given as a fraction (such as 1.5 for the AND gate
above). Instead, the upper and lower bounds are given, separated by a
colon (so 1.5 becomes 2:1, meaning the threshold is between 2 and 1).
Example 3.1 The AND function
Boolean: Q = A AND B
Threshold: Q = < A + B >2:1
Example 3.2 The OR function
Boolean: Q = A OR B
Threshold: Q = < A + B >1:0
A slightly more complex operation, such as the inclusion of an
inversion, is simplified with the minus operator.
Example 3.3 The NOT function
Boolean: Q = A AND NOT B
Threshold: Q = < A - B >1:0
Boolean: Q = A OR NOT B
Threshold: Q = < A - B >0:-1
These functions require two Boolean operations, but can be achieved
with only one threshold operation. In fact, out of the sixteen
possible Boolean operations on two variables, fourteen can be
implemented with one threshold logic element. The other two,
exclusive-or and exclusive-nor, still only require two logic elements
(four components).
Many more complex Boolean operations can be simplified, as the
following examples show:
Example 3.4
Boolean: Q = A OR B AND ( C OR D AND ( E OR F ))
Threshold: Q = < 8A + 5B + 3C + 2D + E + F >8:7
Example 3.5
Boolean: Q = A AND ( B AND C OR D AND E )
Threshold: Q = < 3A + 2< B + C >2:1 + D + E >5:4
Threshold expressions are implemented according to the following
rules:
1. Positive inputs are applied to the load device.
2. Negative inputs are applied to the driver device.
3. Weights are implemented by increasing the relative effect of the
relevant base contact.
4. The threshold is set with the driver device.
Figure 3.8 shows the circuit implementation of example 3.5, and tables
3.1a and 3.1b run through the Boolean and threshold logic to show that
they are correct.
4. Conclusion
The eventual implementation of a bistable pair of reliable and ideal
resonant tunnelling transistors offers a real alternative to digital
design with conventional transistors. Unfortunately, good RTTs are
still some way off, but the logical principles of the device can still
be implemented with alternative configurations, such as hybrid MOSFET
and RTD combinations.
These principles can allow conventional Boolean logic to be expanded
into threshold logic, which allows many digital functions to be
implemented with fewer operations. This in turn leads to a requirement
for fewer components than the equivalent Boolean implementation.
Given that a normal Boolean function can be implemented with fewer
RTTs than conventional transistors anyway, the saving in components
is even greater.
The implementation of resonant tunnelling devices in GaAs and similar
materials is a problem because the investment and experience gained
from device fabrication in silicon is far higher. At the moment, the
types of device mentioned cannot be manufactured using silicon
materials. However, some research is being carried out in this area
so the situation may change in the future [19]. This would bring
these devices into the mainstream of digital computing manufacture,
and would help to drive down the cost of the components.
Another problem is the non-zero power consumption of the components.
When a bistable pair latches into a state, it will always be drawing
current in order to maintain that state. This is unlike CMOS for
instance, which requires power only to switch from one state to
another. However, as the resonant tunnelling devices continue to
decrease in size, so will their current density. This will drive the
current required into the microamp rather than the milliamp scale, and
reduce the power consumption accordingly. The state latched into by a
bistable pair is discovered by checking the voltage on the output, so
the current is able to decrease almost indefinitely.
By far the greatest advantage of resonant tunnelling devices is their
potential for shrinkage. The active region of the device is the
quantum well surrounded by the two barriers, each of which can be
implemented with a few atomic layers. The problem is that the quantum
well region is very difficulty to contact in isolation (for the
manufacture of an RTT), and that the emitter and collector regions on
either side of the active region may be very deep and broad. This
pushes the total size of the device into the micron rather than the
nanometre scale. However, as fabrication technology continues to
improve, these obstacles will hopefully fall away. At that time, the
implementation of extremely complex, yet ultra-small and fast,
computer systems will be possible.
References
1. Bate R T "The quantum-effect device: tomorrow's transistor?"
Scientific American 258 3 pp.78-82 (1988).
2. Randall J N, Reed M A and Frazier G A "Nanoelectronics: Fanciful
physics or real devices?" Journal of Vacuum Science Technology B 7 6
pp.1398-1404 (1989).
3. Weisbuch C and Vinter B "Quantum Semiconductor Structures -
Fundamentals and Applications" Academic Press Inc. (1991) (Chapters I,
II, V and VI).
4. Sze S M "High-speed Semiconductor Devices" John Wiley & Sons (1990).
5. Soderstrom J and Andersson T G "A multiple-state memory cell based
on the resonant tunneling diode" IEEE Electron Device Letters 9 5
pp.200-202 (1988).
6. Sen S, Capasso F, Sivco D and Cho A Y "New resonant-tunneling
devices with multiple negative resistance regions and high room
-temperature peak-to-valley ratio" IEEE Electron Device Letters 9 8
pp.402-404 (1988).
7. Seabaugh A C, Kao Y-C and Yuan H-T "Nine-state resonant tunneling
diode memory" IEEE Electron Device Letters 13 9 pp.479-481 (1992).
8. Seabaugh A C, Luscombe J H and Randall J N "Quantum functional
devices: Present status and future prospects" Future Electron Devices
Journal (Japan) 3 1 pp.9-20 (1993).
9. Moise T S, Seabaugh A C, Beam E A, III and Randall J N
"Room-temperature operation of a resonant-tunneling hot-electron
transistor based integrated circuit" IEEE Electron Device Letters 14 9
pp.441-443 (1993).
10. Seabaugh A C, Beam E A, Kao Y-C, Luscombe J H and Randall J N
"Resonant tunneling transistors" OSA Proceedings on Ultrafast
Electronics and Optoelectronics 14 pp.65-70 (1993).
11. Reddy U K, Haddad G I, Mehdi I and Mains R K "Fabrication and room
temperature operation of a resonant tunneling transistor with a
pseudomorphic InGaAs base" pp.189-194 from Nanostructure physics and
fabrication Proceedings of the International Symposium March 13-15,
1989, Academic Press Inc. (Reed M A and Kirk W P eds.)
12. Meazawa K and Mizutani T "A new resonant tunneling logic gate
employing monostable-bistable transition" Japanese Journal of Applied
Physics - Part 2 32 1A/B pp.L42-L44 (1993).
13. Maezawa K, Akeyoshi T and Mizutani T "Flexible and
reduced-complexity logic circuits implemented with resonant tunneling
transistors" IEDM pp.415-418 (1993)
14. Akeyoshi T, Maezawa K and Mizutani T "Weighted sum threshold logic
operation of MOBILE (monostable-bistable transition logic element)
using resonant tunneling transistors" IEEE Electron Device Letters 14
10 pp.475-477 (1993).
15. Akeyoshi T, Maezawa K and Mizutani T "Threshold logic function on
both positive and negative weighted sums in multiple-input
monostable-bistable transition logic elements" Japanese Journal of
Applied Physics - Part 1 33 1B pp.794-797 (1994).
16. Maezawa K, Akeyoshi T and Mizutani T "Functions and applications
of monostable-bistable transition logic elements (MOBILE's) having
multiple-input terminals" IEEE Transactions on Electron Devices 41 2
pp.148-154 (1994).
17. Chen K, Akeyoshi T and Maezawa K "Monostable-bistable transition
logic elements (MOBILEs) based on monolithic integration of resonant
tunneling diodes and FETs" Japanese Journal of Applied Physics - Part
1 34 2B pp.1199-1203 (1995).
18. Lewis P M and Coates C L "Threshold Logic" John Wiley & Sons
(1967).
19. Yuki K, Hirai Y, Morimoto K, Inoue K, Niwa M and Yasui J
"Fabrication of novel Si double-barrier structures and their
characteristics" Japanese Journal of Applied Physics - Part 1 34 2B
pp.860-863 (1995).

[UCL Physics & Astronomy Homepage]
[UCL Image Processing Group Homepage]
Last updated: July 24, 1996 by Colin Moffat